1. Field of the Invention
The present invention relates to a system in which a data bus is used, and more particularly, to an apparatus and method for driving a bus with low power consumption.
2. Description of the Related Art
As portable systems such as palm top computers, smart phones, and personal digital assistants are widely used, the demand for integrated circuits with low power consumption is rapidly increasing. This is because it is important to secure a certain level of operation time using restricted power of batteries in portable systems.
At this time, reducing power consumption by a data bus is important to developing the integrated circuits in which low power consumption is required. This is because power consumed in the bus accounts for a considerable amount of power consumed in the entire integrated circuit. In general, a bus driving apparatus generates a bus driving voltage, corresponding to the binary logic level of input data, and transmits the generated bus driving voltage to the bus receiving apparatus through the data bus. At this time, the bus receiving apparatus restores the bus driving voltage received through the data bus to original input data. At this time, the data bus consumes power since a parasitic capacitance of the generally long data bus Cw is charged or discharged whenever the logic level, of the bus driving voltage changes.
In the conventional bus driving apparatus, the width of the change in the level of the bus driving voltage (or the swing width of the bus driving voltage) transmitted to the bus receiving apparatus through the data bus is very large. Therefore, since a large amount of charge is charged or discharged in the parasitic capacitor Cw, power consumption by the data bus becomes larger.